minimig AGA v1.1 for the MiST board released

There is a new release of minimig-AGA for the MiST board available, grab your fresh copy on the minimig-mist page!

Here are the updates made in this release:

  • fixed mouse issues (fixes games Like Ishar 1, 2, 3, Robinson’s Requiem, and many cracktros)
  • fixed keyboard issues (fixes game Walker and probably many others)
  • changes to FPGA clock handling, hopefully this will make a more stable minimig core
  • entering the OSD menu using UP+DOWN buttons on a DB-9 connected joystick has been disabled
  • 1MB kickstart ROM support added (enables you to run AROS ROM or your custom kickstart ROM)
  • firmware now again supports using 256kB kickstart ROMs
  • firmware now again supports using Cloanto AmigaForever encrypted kickstart ROMs

Enjoy!

minimig AGA v1.0 for the MiST board released

There is a new release of minimig-AGA for the MiST board available, grab your fresh copy on the minimig-mist page!

It certainly took a while, but I think I can safely say that the AGA chipset is implemented correctly and in full now, but of course with lots of corner cases not handled properly. There are still quite some problems on the CPU side though, those will hopefully be fixed in time.

There are some issues worth mentioning – one is that the turbo kickstart is not working properly in all cases, so for now this feature is experimental, and it is recommended to only enable it if you don’t have any problems with it. The other issue is that currently, the HRTmon monitor doesn’t work OK when the VBR is moved to fastRAM, so either don’t use utilities like VBRMove, or don’t use HRTmon.

In the zip file, there is a firmware.upg added. There is no need to update the firmware of the MiST board if your firmware is newer than 16th of June 2015. If it is older, it is recommended to update your firmware.

Here are the updates made in this release:

  • fixed AGA color table issues
  • fixed erroneous detection of HAM, HAM8 & EHB modes in AGA
  • fixed AGA BPLXOR implementation
  • implemented AGA bitplane scandoubling
  • implemented AGA sprite scandoubling & SSCAN2 SH10 coincidence detection
  • implemented proper AGA bitplane scroller with quarter pixel scrolling precision
  • fixed AGA BPLCON4 values delay
  • playfield CLUT offsets fixed
  • ECS sprite attach enabled for both odd and even attach bit
  • turbo options for chipRAM & kickstart
  • new 8kB two-way, write-through, look-through CPU cache with separate instruction & data caches
  • CPU PACK & UNPK instruction fixes by Till Harbaum
  • updated very fast CPU by Alastair M. Robinson (in the newcpu build)
  • CIA TOD bug fixed
  • HRTmon with custom registers mirror
  • chipset config applied only on reset
  • config display added on boot screen

Enjoy!

EDIT:

a video showing the speed of the new CPU on this release:

Amiga Anniversary

2015 – The Year of Amiga Anniversaries

On this day 10 years ago, Dennis van Weeren made the first recorded commit on his then new project, Minimig (see Changelog here), so this makes today the 10th anniversary of Minimig.

The project started as a sort of proof-of-concept, showing that it is possible to re-create Amiga custom chipset in an FPGA. In around three years, Dennis made a fairly complete implementation of the OCS chipset. Amiga community – with history of disappointments behind it  – met the project with much disbelief at first, a lot of people didn’t believe it could be done until first public demonstrations of the minimig design were made. Unfortunately, Dennis stopped working on minimig and it seems he left the Amiga community, but he did publish the sources of his project under the GPL license, which allowed others to continue where he left off.

One of those developers was Jakub Bednarski (yaqube), who upgraded the minimig design, added missing features, basically bringing minimig to almost 100% compatibility with OCS/ECS Amigas. He too, so it seems, isn’t involved in the Amiga scene or minimig development anymore. He did make the first AGA chipset upgrade of the minimig with RTG graphics, AHI sound etc, but the project was never published.

I got involved in the minimig project somewhere at the end of 2011, trying to upgrade the minimig port to the DE1 board from where Tobias Gubener (tobiflexx) left it, hopefully adding some nice additions to the design. At that time, I already heard of work being done on AGA minimig, so I patiently waited for the design to be published. Unfortunately, that didn’t happen, so I decided to try and implement AGA for the minimig myself. Currently, most of the AGA chipset seems to be implemented correctly, with some missing features and probably a lot of corner cases working incorrectly. Hopefully, I’ll find some time soon to finish it!

The minimig project has grown from its beginnings on the original minimig board to quite a few other boards, like MiST, Terasic DE1/DE2, Terasic DE2-70, Chameleon64, C-ONE, FPGA Arcade Replay board, etc …

It certainly seems the project is alive and well, and will continue to thrive even after me and other current ‘generation’ developers leave the project. So here’s to (at least!) another ten great years for the minimig project!

Incidentally, this year also marks the 30th anniversary of Amiga! It is so long ago that I first played with mine I can barely remember, but I sure do remember the fun I had and awe I felt towards it.

Happy birthday old gal!

(obligatory Only Amiga song ;))

Upgrading minimig with AGA capabilities, Part 2

So, to continue from Part 1, the rest of additions in Denise.

Denise bitplane updates

First, of  course, the bitplane count needs to be upgraded from ECS’ 6 bitplanes to AGA’s 8 bitplanes, together with everything dependent on it, like collision detection for 8 bitplanes, two additional bitplane output buffer registers, playfield support, etc. Quite a lot of code changes in this step, but not hard to do – basically, I just followed the existing code and used common sense and the AGA.guide document.

The tricky part is the 64bit bitplane shifter and accompanying logic. This requires upgrading the existing 16bit output shifter to 64bits, together with new scroller implementation. I spent quite some time on this, and I know it doesn’t work correctly yet, as some games scroll very strangely – moving a few pixels in one direction and then ‘jumping’ back a lot of pixels and so on. The scroller will definitely need to be fixed sometime in the future. The scroller / shifter implementation seems to be dependent on selected resolution *and* the fetch mode, I just don’t see how it fits together. There’s also some undocumented ‘extra_delay’ involved here, I just don’t understand it yet nor see where it comes from.

Denise sprite updates

Sprites are somewhat easier, once you realize how the 64bit fetches fit in. The sprite output data gets extended from four bits to eight bits by adding four new OSPRM/ESPRM bits to MSB of the output. The trick is that the 64bit fetches are only for the sprite data, not for the sprite control word – I figured that out after reading some demo coder description of how the sprite control & data need to be laid out in memory for wide sprites to work. Still missing is the part of sprite scandoubling that can ‘double’ the sprite horizontally, I haven’t figured that out yet.

Agnus bitplane DMA updates

This is the part I spent the most time on. Agnus contains a bitplane DMA sequencer, that does different DMA sequences according to resolution and selected number of bitplanes. To support AGA’s eight bitplanes and two additional fetch modes, the sequencer had to be extended with the new sequences. I studied this a lot, used many pieces of paper drawing diagrams and sequences which could work. In the end, I decided for the simplest approach with the least changes required – as I did for every other AGA change, and it seemed to work. It works very simply now: the sequencer has five ‘programs’, which includes all resolutions (lores, hires & shres) and all three fetch modes. All odd planes come first, followed by even planes, with plane 0 being always the last, since fetching plane 0 starts the parallel-to-serial converters in Denise (and enables sprites!). Another trick is that two of the sequences have free cycles following bitplane DMA cycles. The sequence length is also increased from ECS’ eight cycles to AGA’s 32 cycle sequences.

I made a program visualizing the five different encodings of the sequencer:

#include <stdlib.h>
#include <stdio.h>
#include <string.h>

int main()
{
unsigned int ddfseq;

printf("old sequencer:\n");
printf("ddfseq shres hires lores\n");
for (ddfseq=0; ddfseq<8; ddfseq++) {
unsigned int ddfseq_neg = (~ddfseq);
unsigned int shres = (((ddfseq_neg&1)?1:0)<<0);
unsigned int hires = (((ddfseq_neg&1)?1:0)<<1) | (((ddfseq_neg&2)?1:0)<<0);
unsigned int lores = (((ddfseq_neg&1)?1:0)<<2) | (((ddfseq_neg&2)?1:0)<<1) | (((ddfseq_neg&4)?1:0)<<0);
printf("%01d %01d %01d %01d\n", ddfseq, shres, hires, lores);
}
printf("\n");

printf("new sequencer:\n");
printf(" mode 1 = 2-fetch sequence (SHRES FMode = 0)\n");
printf(" mode 2 = 4-fetch sequence (HRES FMode = 0, SHRES FMode = 1)\n");
printf(" mode 3 = 8-fetch sequence (LRES FMode = 0, HRES FMode = 1, SHRES, FMode = 3)\n");
printf(" mode 4 = 8-fetch sequence followed by 8 free cycles (LRES FMode = 1, HRES FMode = 3)\n");
printf(" mode 5 = 8-fetch sequence followed by 24 free cycles (LRES FMode = 3)\n");
printf("ddfseq 01 02 03 04 05\n");
for (ddfseq=0; ddfseq<32; ddfseq++) {
unsigned int ddfseq_neg = (~ddfseq);
unsigned int m1 = (((ddfseq_neg&1)?1:0)<<0);
unsigned int m2 = (((ddfseq_neg&1)?1:0)<<1) | (((ddfseq_neg&2)?1:0)<<0);
unsigned int m3 = (((ddfseq_neg&1)?1:0)<<2) | (((ddfseq_neg&2)?1:0)<<1) | (((ddfseq_neg&4)?1:0)<<0);
unsigned int m4 = (((ddfseq &8)?1:0)<<3) | (((ddfseq_neg&1)?1:0)<<2) | (((ddfseq_neg&2)?1:0)<<1) | (((ddfseq_neg&4)?1:0)<<0);
unsigned int m5 = (((ddfseq &16)?1:0)<<4) | (((ddfseq &8)?1:0)<<3) | (((ddfseq_neg&1)?1:0)<<2) | (((ddfseq_neg&2)?1:0)<<1) | (((ddfseq_neg&4)?1:0)<<0);
printf("%02d %02d %02d %02d %02d %02d\n", ddfseq, m1, m2, m3, m4, m5);
}

exit(EXIT_SUCCESS);
}

I made one mistake in the bitplane DMAs implementation that took me a while to fix – I forgot to change how much the bitplane pointers advanced according to fetch mode. I made numerous tests in AsmOne trying the 64bit bitplane fetches, and they simply didn’t work, but after many reviews of the code I saw my mistake – the code needs to advance the bitplane pointers by 1 for 16bit fetches, 2 for 32bit fetches and 4 four 64bit fetches. Duh 😉 After fixing the bitplane modulos, the bitplane DMAs were ready.

Agnus sprite updates

After figuring out the bitplane DMA updates, the sprite DMA was pretty easy – just advance the sprite data pointers by an appropriate amount, at that is it!

Aaand …. done (almost)!

One of the last thing I changed was the Denise ID register, updating it with the proper AGA ID value. Once you do that and start Workbench, SetPatch will detect an AGA Amiga and try to enable 64bit bitplane fetch mode. Let’s just say the result wasn’t very good at first, but after lots of small bits fixed here and there, I got a perfect-looking desktop with 4x fetch mode enabled! Even some games worked, although most of them were a little slow, since the CPU bandwidth to the chipRAM and kickstart is still as slow as on ECS Amigas (the CPU on AGA Amigas can access chipRAM through a 32bit bus, also kickstart uses two ROM ICs, making kickstart accessible through a 32bit bus also).

That concludes the current minimig AGA implementation. There are still some missing features, like bitplane & sprite scandoubling, plus extending the CPU speed when accessing chipRAM & kickstart, like mentioned above. All in all, I spent around two weeks working on this, a week of afternoon work for upgrading the minimig design to a single 28MHz clock and a week when I was on sick leave for most of the AGA stuff. The bitplane DMAs and the bitplane output shifters were definitely the most tricky parts to get right.

And for any reader that managed to read through this very long two-post rambling – congratulations for your persistence! I’ll invite you to a beer if we ever happen to meet!

If you want to take a look at the minimig code, my repository is here: https://github.com/rkrajnc/minimig-mist