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Month: November 2014

Upgrading minimig with AGA capabilities, Part 2

So, to continue from Part 1, the rest of additions in Denise. Denise bitplane updates First, of  course, the bitplane count needs to be upgraded from ECS’ 6 bitplanes to AGA’s 8 bitplanes, together with everything dependent on it, like collision detection for 8 bitplanes, two additional bitplane output buffer registers, playfield support, etc. Quite a lot of code changes in this step, but not hard to do – basically, I just followed the existing code and…

Upgrading minimig with AGA capabilities, Part 1

So now that the first beta version of minimig-AGA for the MiST board is out, I thought I’d write a few words describing how I went about implementing this. In short – it was easier than I expected, but with a few very tricky parts. A little background As you may or may not know, Jakub Bednarski (yaqube) already upgraded the minimig design with AGA capabilities a while ago, but the code was never published,…

HRTmon & Updating NMI vector

One of the features added on the 68010+ Motorola CPUs is a special register called VBR – Vector Base Register, which allows the OS or user program to move the CPU’s vector table away from 68000‘s fixed address $00000 to some other address. On the Amiga, this was usually used to move the vector table to fastRAM, enabling somewhat faster interrupt processing. One of the utilities that allowed this was VBRMove. I usually have VBRMove…