A little update on the minimig core

Quite some time has passed from the last minimig release, so I thought I’d write a short update on what’s going on.

The work on minimig-mist aga v1.2 is progressing, albeit slowly, since I don’t have much free time right now. Here are some of the fixes already implemented and in testing:

  • video dithering (both random and spatial) have been fixed – the dithering didn’t work at all before
  • scanlines can now be enabled in non-scandoubled mode
  • CPU cache control with the CACR register implemented
  • fixed reset problems and fast RAM disappearing
  • kickstart ROM is also uploaded to kickstart mirror position (E0)

Two chipset bugs were also discovered and fixed. The first one was a sprite colortable lookup problem, which was sometimes apparent as a missing sprite line, or wrong sprite color (see here for an example: https://www.youtube.com/watch?v=HD5znZGIvP4). This one was very hard to track down – it required single stepping through the frame with WinUAE debugger, but very easy to fix. The other one was a blitter line mode problem (see http://www.a1k.org/forum/showpost.php?p=904090&postcount=54), that was just the opposite – very easy to track down, and harder to fix.

Till Harbaum has made some updates to the CPU bitfield instructions, that fixes *a lot* of games and demos. There are still some stability problems with the CPU, I’m working on ways to fix that.

Besides that, a few other changes are still planned for the 1.2 release:

  • programmable display modes (Productivity, DblPAL/DblNTSC, Euro36/Euro72)
  • HELP button fix
  • ethernet support (hopefully!)

I think I still need a week or two before the release will be ready. I’ll keep you updated!

4 thoughts on “A little update on the minimig core

  1. Mahen says:

    Oh, I forgot one question ! Will the TURBO option still be required in the future ? This one is required by some AGA games but decreases ECS compatiblity.

    Again, awesome work !! πŸ™‚

  2. chaos says:


    I forgot to mention the turbo option. While the option will still be present for Workbench usage, it won’t be required for games or demos. A little explanation:
    the CPU core that we use only has a 16-bit data bus, but the CPUs on AGA Amigas had 32-bit data buses. To make it work as fast as needed, the path from CPU to chipRAM and ROM were bypassed from going through the chipset and directly accessed SDRAM. Of course, this brings some problems, as the CPU is no longer forced to wait for chipset DMA, which is required in some cases.

    This will be fixed by still using the direct SDRAM path, but making sure the CPU is waiting when, for example, BLITHOG is enabled. This is still not a perfect solution, so some problems will still remain. But until we have a CPU core with proper 32-bit data bus, it is the best that can be done.

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